1 ##########################################################################
2 Copyright (c) 2009-2014, ETH Zurich.
5 This file is distributed under the terms in the attached LICENSE file.
6 If you do not find this file, copies can be found by writing to:
7 ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group.
8 ##########################################################################
11 --------------------------------
13 Barrelfish currently runs on:
15 * x86 CPUs in either IA-32 or AMD64 mode. The following are known to work:
17 - Intel Xeon Clovertown, Gainestown, Beckton, IvyBridge, Haswell (X5355,
18 E5520, X7560, L5520, L7555, E5-2670v2, E3-1245v3)
19 - AMD Opteron Italy, Santa Rosa, Barcelona, Shanghai, Istanbul, Magny Cours
20 (275, 2220, 8350, 8374, 8380, 8431, 6174)
21 - QEMU simulator (2.0.0)
23 * ARM CPUs, specifically ARMv7 and ARMv5. The following platforms are known to work:
25 - The integratorcp ARMv5 machine as simulated by QEM
26 - The Texas Instruments OMAP4460 Pandaboard ES SoC
27 (Barrelfish runs on both the A9 and the M3 cores)
28 - The ARM VExpress EMM board as simulated by GEM5
29 - There is also limited support for the Netronome i8000 card, incorporating
30 a single Intel iXP2800 processor
32 This README file provides instructions for the x86 architecture. For other
33 architectures, please refer to the architecture-specific technical notes (e.g.,
34 see TN 06 for the SCC, and TN 17 for ARM).
36 You can either generate the latest documentation from this source-code
37 (instructions at end of this file), or visit the Barrelfish_ website
40 .. _Barrelfish: http://www.barrelfish.org/
43 --------------------------------
45 Barrelfish supports following PC hardware :
47 * x86 CPUs in either IA-32 or AMD64 mode. The following are known to work:
49 - Intel Xeon Clovertown, Gainestown, Beckton, Ivy Bridge, Haswell (X5355,
50 E5520, X7560, L5520, L7555, E5-2670v2, E3-1245v3)
51 - AMD Opteron Italy, Santa Rosa, Barcelona, Shanghai, Istanbul, Magny Cours
52 (275, 2220, 8350, 8374, 8380, 8431, 6174)
53 * Note: the Opteron 275 do not work in IA-32 mode.
55 The biggest compatibility problems are likely to be in the PCI/ACPI code. We
56 usually discover new quirks (or missing functionality in the ACPI glue code)
57 on each new machine we test. The following systems are known to work:
60 * Tyan n6650W and S4985
62 * Dell PowerEdge R610 and R905
63 * Sun Fire X2270 and X4440
64 * Intel/Quanta QSSC-S4R
65 * Lenovo X200 and X301 laptops
66 * ASUS Eee PC 1015PEM netbooks
68 The e1000n driver should work with most recent Intel gigabit ethernet
69 controllers (see the list in devices/e1000.dev). We've mostly used the
70 82572EI (PCI device ID 0x1082).
72 You should also be able to boot Barrelfish on a recent version of QEMU (0.14);
73 note that the e1000 device emulated by QEMU is not supported by our driver.
76 --------------------------------
78 We are making sure that Barrelfish and its tools can be built using the
81 * GCC 4.8.2 for x86_64 and x86_32
82 - cross-compiling between i386 and x86_64 works (install gcc-multilib on 64 bit Ubuntu LTS)
83 * GCC 4.7.3 for ARMv5 and ARMv7
84 - gcc-arm-linux-gnueabi and g++-arm-linux-gnueabi on Ubuntu LTS
85 * GNU binutils (2.24 is known to work)
87 * GHC v7.6.3 and Parsec 3.1
88 - older versions of the tree supported v6.10 or v6.12.2 with Parsec 2.1 or
90 - GHC v6.12.1 has a known bug and is unable to build our tools
91 - earlier versions of GHC are unsupported
93 Our build system may not be very portable; if in doubt, try building on the
94 latest Ubuntu LTS system (14.04.1), as this is what we use to run nightly
99 --------------------------------
101 1. Assuming you have already unpacked the sources, create a build directory ::
103 $ mkdir build && cd build
105 1. Run ``hake.sh``, giving it the path to the source directory and target
108 $ ../hake/hake.sh -s ../ -a x86_64
110 This will configure the build directory and use GHC to compile and then run
111 hake, a tool used to generate the ``Makefile``.
113 3. Optionally, edit the configuration parameters in ``hake/Config.hs`` and
114 run ``make rehake`` to apply them.
116 4. Run make, and wait ::
120 5. If everything worked, you should now be able to run Barrelfish inside QEMU ::
124 Installing and Booting
125 --------------------------------
127 Barrelfish requires a Multiboot-compliant bootloader that is capable of loading
128 an ELF64 image. At the time of writing, this doesn't include the default GRUB.
129 Your options are either:
131 * use the pre-loader "elver" that can be found in the tools directory
132 * patch GRUB to support a 64-bit kernel image, using this patch_.
134 .. _patch: http://savannah.gnu.org/bugs/?17963
136 "Installing" Barrelfish currently consists of copying the ELF files for the CPU
137 driver and user programs to a location that the target machine can boot from,
138 and writing a suitable menu.lst file that instructs the bootloader (GRUB) which
139 programs to load and the arguments to pass them.
141 If you specify an appropriate INSTALL_PREFIX, ``make install`` will copy the
142 binaries to the right place for you, eg ::
144 $ make install INSTALL_PREFIX=/tftpboot/barrelfish
146 We usually boot Barrelfish via PXE/TFTP, although loading from a local disk
147 also works. Instructions for setting up GRUB to do this are beyond the scope of
148 this document. Assuming you have such a setup, here is a sample menu.lst file
149 for a basic diskless boot that doesn't do anything useful beyond probing the
150 PCI buses and starting a basic shell ::
154 kernel /barrelfish/x86_64/sbin/elver
155 module /barrelfish/x86_64/sbin/cpu
156 module /barrelfish/x86_64/sbin/init
157 module /barrelfish/x86_64/sbin/mem_serv
158 module /barrelfish/x86_64/sbin/monitor
159 module /barrelfish/x86_64/sbin/ramfsd boot
160 module /barrelfish/x86_64/sbin/skb boot
161 modulenounzip /barrelfish/skb_ramfs.cpio.gz nospawn
162 module /barrelfish/x86_64/sbin/acpi boot
163 module /barrelfish/x86_64/sbin/pci boot
164 module /barrelfish/x86_64/sbin/spawnd boot
165 module /barrelfish/x86_64/sbin/serial
166 module /barrelfish/x86_64/sbin/fish
168 There are many other programs you can load (take a look around the usr tree for
169 examples). To start a program on a core other than the BSP core, pass
170 ``core=N`` as its first argument.
172 If things work, you should see output on both the VGA console and COM1.
174 Generating Documentation
175 --------------------------------
177 Barrelfish documentation can be found on Barrelfish website
178 (http://www.barrelfish.org/). And it can be also generated from the code tree.
179 For documentation generation, you will need ``latex`` packages installed,
180 including support for ``pdflatex``. Following are the instructions for
181 generating the documentation assuming you have already unpacked the sources ::
183 $ mkdir build && cd build
184 $ ../hake/hake.sh -s ../
187 You will find all the technotes in ``docs/`` directory.
190 --------------------------------
192 There are many. Those you're likely to encounter include:
194 * The documentation is incomplete and out of date.
195 * Some drivers and user programs are known not to build, and are
196 not included in the default set of targets (MODULES) in the Makefile.
199 --------------------------------
201 Q: How do I run a program?
202 A: Add it to the boot sequence by specifying the module in your menu.lst file.
203 For example, to run the memtest program, add the line:
204 module /PATH/x86_64/sbin/memtest
205 to the end of menu.lst, where PATH is relative either to your TFTP
206 server's root directory (when booting on hardware) or to your build
207 directory (when using a simulator such as QEMU).
208 If memtest runs, you should see it output "memtest passed successfully!".
210 Q: Where's the CPU driver?
211 A: It's in the directory named kernel :) But don't worry, it really does run
212 independently on each core.
214 Q: Where is the source for the SPLASH2 benchmarks? It seems to be missing.
215 A: The license for these prevents redistribution, so we were forced to ship our
216 changes as a patch. See usr/splash2/README for further instructions.
218 Q: Can I use a debugger?
219 A: Maybe. There are two options at the moment:
220 * On a simulator, using whatever debug interfaces it supports.
221 For QEMU, you could try the "debugsim" target.
222 * On hardware, using the kernel-mode remote GDB stubs that operate on the
223 primary serial port and are entered in response to a kernel trap or
224 exception. However, these are not well maintained, and may not be usable
225 beyond reading/writing memory locations and inspecting the stack.
226 When debugging the kernel, beware that it is relocated to an address
227 determined at core boot time. Look for output such as:
228 "Kernel starting at address 0xffffffffc072b000".
230 Q: Where can I find more information, including papers and new releases?
231 A: http://www.barrelfish.org/
232 http://wiki.barrelfish.org/
235 A: We'd certainly like to hear from you. Feel free to send patches (or even
236 git merge requests) to the Barrelfish mailing list.
238 To keep track of contributions to Barrelfish, we use a sign-off procedure
239 similar to the Linux kernel:
241 The sign-off is a simple line at the end of the explanation for the patch,
242 which certifies that you wrote it or otherwise have the right to pass it on
243 as an open-source patch. The rules are pretty simple: if you can certify
246 Developer's Certificate of Origin 1.1
248 By making a contribution to this project, I certify that:
250 (a) The contribution was created in whole or in part by me and I
251 have the right to submit it under the open source license
252 indicated in the file; or
254 (b) The contribution is based upon previous work that, to the best
255 of my knowledge, is covered under an appropriate open source
256 license and I have the right under that license to submit that
257 work with modifications, whether created in whole or in part
258 by me, under the same open source license (unless I am
259 permitted to submit under a different license), as indicated
262 (c) The contribution was provided directly to me by some other
263 person who certified (a), (b) or (c) and I have not modified
266 (d) I understand and agree that this project and the contribution
267 are public and that a record of the contribution (including all
268 personal information I submit with it, including my sign-off) is
269 maintained indefinitely and may be redistributed consistent with
270 this project or the open source license(s) involved.
272 then you just add a line saying
274 Signed-off-by: Random J Developer <random@developer.example.org>
276 Note that git has support for adding such a message in the end of the commit