2 * Copyright (c) 2014, ETH Zurich.
5 * This file is distributed under the terms in the attached LICENSE file.
6 * If you do not find this file, copies can be found by writing to:
7 * ETH Zurich D-INFK, CAB F.78, Universitaetstr 6, CH-8092 Zurich.
10 #ifndef OMAP44XX_SDMA_H_
11 #define OMAP44XX_SDMA_H_
14 #include <dev/omap/omap44xx_sdma_dev.h>
16 typedef uint8_t omap_sdma_channel_t;
17 struct sdma_driver_state;
19 typedef void (*omap_sdma_irq_handler_t)(struct sdma_driver_state*, omap_sdma_channel_t, errval_t);
21 typedef uint8_t omap44xx_sdma_color_mode_t;
22 #define omap44xx_sdma_DISABLE_COLOR_MODE ((omap44xx_sdma_color_mode_t)0x0)
23 #define omap44xx_sdma_TRANSPARENT_COPY ((omap44xx_sdma_color_mode_t)0x1)
24 #define omap44xx_sdma_CONSTANT_FILL ((omap44xx_sdma_color_mode_t)0x2)
26 #define OMAP44XX_SDMA_IRQ_LINE (0)
27 #define OMAP44XX_SDMA_NUM_CHANNEL (32u)
28 #define OMAP44XX_SDMA_IRQ (32 + 12 + OMAP44XX_SDMA_IRQ_LINE) // MA_IRQ_12
30 #define OMAP44XX_SDMA_MAX_FN 0x0000FFFF
31 #define OMAP44XX_SDMA_MAX_EN 0x00FFFFFF
33 #define OMAP44XX_SDMA_MAX_FN_BITS 15
34 #define OMAP44XX_SDMA_MAX_EN_BITS 23
37 #define SDMA_PRINT(...) do{ printf(__VA_ARGS__ ); } while( false )
39 #define SDMA_PRINT(...) do{ } while ( false )
44 /// Channel State. Filled by the interrupt callback, read by the request task.
45 struct channel_state {
50 struct sdma_driver_state {
51 omap44xx_sdma_t devsdma;
53 bool allocated_channel[OMAP44XX_SDMA_NUM_CHANNEL];
54 struct channel_state channel_state[OMAP44XX_SDMA_NUM_CHANNEL];
55 omap_sdma_irq_handler_t irq_callback;
60 struct omap_sdma_transfer_conf {
61 lpaddr_t start_address;
62 omap44xx_sdma_addr_mode_t addr_mode;
63 int16_t element_index;
66 omap44xx_sdma_burst_en_t burst_mode;
69 struct omap_sdma_transfer_size {
70 uint32_t element_number;
71 uint16_t frame_number;
72 omap44xx_sdma_data_type_t data_type;
75 /// The values in this struct are directly written into the hardware registers.
76 /// While there are some basic sanity checks, it is the users responsibility to
77 /// ensure that writes to these physical addresses are allowed.
79 /// The naming follows more or less Chapter 16 of the OMAP4466 TRM (Rev. AA)
81 struct omap_sdma_channel_conf {
82 omap44xx_sdma_port_priority_t read_priority;
83 omap44xx_sdma_port_priority_t write_priority;
85 omap44xx_sdma_color_mode_t color_mode;
88 omap44xx_sdma_write_mode_t write_mode;
90 struct omap_sdma_transfer_size transfer_size;
91 struct omap_sdma_transfer_conf src_conf;
92 struct omap_sdma_transfer_conf dst_conf;
95 omap_sdma_channel_t next_channel;
98 errval_t omap_sdma_init(struct sdma_driver_state*, mackerel_addr_t, omap_sdma_irq_handler_t);
100 errval_t omap_sdma_allocate_channel(struct sdma_driver_state* st, omap_sdma_channel_t *channel);
101 void omap_sdma_free_channel(struct sdma_driver_state* st, omap_sdma_channel_t channel);
103 void omap_sdma_init_channel_conf(struct omap_sdma_channel_conf *conf);
105 void omap_sdma_set_channel_conf(struct sdma_driver_state* st, omap_sdma_channel_t channel,
106 struct omap_sdma_channel_conf *conf);
108 void omap_sdma_enable_channel(struct sdma_driver_state* st, omap_sdma_channel_t channel, bool interrupt);
110 errval_t omap_sdma_poll_channel(struct sdma_driver_state* st, omap_sdma_channel_t channel);
112 #endif // OMAP44XX_SDMA_H_