fcb4600c6648f6367625edcc5f460d7132eb478a
[barrelfish] / usr / drivers / omap44xx / sdma / omap_sdma.h
1 /*
2  * Copyright (c) 2014, ETH Zurich.
3  * All rights reserved.
4  *
5  * This file is distributed under the terms in the attached LICENSE file.
6  * If you do not find this file, copies can be found by writing to:
7  * ETH Zurich D-INFK, CAB F.78, Universitaetstr 6, CH-8092 Zurich.
8  */
9
10 #ifndef OMAP44XX_SDMA_H_
11 #define OMAP44XX_SDMA_H_
12
13 #include <stdbool.h>
14 #include <dev/omap/omap44xx_sdma_dev.h>
15
16 typedef uint8_t omap_sdma_channel_t;
17
18 typedef void (*omap_sdma_irq_handler_t)(omap_sdma_channel_t, errval_t);
19
20 typedef uint8_t omap44xx_sdma_color_mode_t;
21 #define omap44xx_sdma_DISABLE_COLOR_MODE ((omap44xx_sdma_color_mode_t)0x0)
22 #define omap44xx_sdma_TRANSPARENT_COPY   ((omap44xx_sdma_color_mode_t)0x1)
23 #define omap44xx_sdma_CONSTANT_FILL      ((omap44xx_sdma_color_mode_t)0x2)
24
25 #define OMAP44XX_SDMA_IRQ_LINE (0)
26 #define OMAP44XX_SDMA_NUM_CHANNEL (32u)
27 #define OMAP44XX_SDMA_IRQ (32 + 12 + OMAP44XX_SDMA_IRQ_LINE) // MA_IRQ_12
28
29 #define OMAP44XX_SDMA_MAX_FN    0x0000FFFF
30 #define OMAP44XX_SDMA_MAX_EN    0x00FFFFFF
31
32 #define OMAP44XX_SDMA_MAX_FN_BITS    15
33 #define OMAP44XX_SDMA_MAX_EN_BITS    23
34
35 #ifdef SDMA_DEBUG
36 #define SDMA_PRINT(...) do{ printf(__VA_ARGS__ ); } while( false )
37 #else
38 #define SDMA_PRINT(...) do{ } while ( false )
39 #endif
40
41 struct omap_sdma_transfer_conf {
42     lpaddr_t start_address;
43     omap44xx_sdma_addr_mode_t addr_mode;
44     int16_t element_index;
45     int32_t frame_index;
46     bool packed_transfer;
47     omap44xx_sdma_burst_en_t burst_mode;
48 };
49
50 struct omap_sdma_transfer_size {
51     uint32_t element_number;
52     uint16_t frame_number;
53     omap44xx_sdma_data_type_t data_type;
54 };
55
56 /// The values in this struct are directly written into the hardware registers.
57 /// While there are some basic sanity checks, it is the users responsibility to
58 /// ensure that writes to these physical addresses are allowed.
59 ///
60 /// The naming follows more or less Chapter 16 of the OMAP4466 TRM (Rev. AA)
61
62 struct omap_sdma_channel_conf {
63     omap44xx_sdma_port_priority_t read_priority;
64     omap44xx_sdma_port_priority_t write_priority;
65
66     omap44xx_sdma_color_mode_t color_mode;
67     uint32_t color;
68
69     omap44xx_sdma_write_mode_t write_mode;
70
71     struct omap_sdma_transfer_size transfer_size;
72     struct omap_sdma_transfer_conf src_conf;
73     struct omap_sdma_transfer_conf dst_conf;
74
75     bool enable_link;
76     omap_sdma_channel_t next_channel;
77 };
78
79 errval_t omap_sdma_init(mackerel_addr_t dev_base, omap_sdma_irq_handler_t);
80
81 errval_t omap_sdma_allocate_channel(omap_sdma_channel_t *channel);
82 void omap_sdma_free_channel(omap_sdma_channel_t channel);
83
84 void omap_sdma_init_channel_conf(struct omap_sdma_channel_conf *conf);
85
86 void omap_sdma_set_channel_conf(omap_sdma_channel_t channel,
87     struct omap_sdma_channel_conf *conf);
88
89 void omap_sdma_enable_channel(omap_sdma_channel_t channel, bool interrupt);
90
91 errval_t omap_sdma_poll_channel(omap_sdma_channel_t channel);
92
93 #endif // OMAP44XX_SDMA_H_