char *mmap_addr = MBADDR_ASSTRING(glbl_core_data->mmap_addr);
genpaddr_t last_end_addr = 0;
+ char *clean_mmap_addr;
+ uint32_t clean_mmap_length;
+ cleanup_bios_regions(mmap_addr, &clean_mmap_addr, &clean_mmap_length);
+
+
for(char *m = mmap_addr; m < mmap_addr + glbl_core_data->mmap_length;) {
struct multiboot_mmap *mmap = (struct multiboot_mmap * SAFE)TC(m);
// Map PDPTE into first slot in pagecn
caps_create_new(ObjType_VNode_x86_32_pdpt,
mem_to_local_phys((lvaddr_t)init_pdpte),
- BASE_PAGE_BITS, 0,
+ BASE_PAGE_BITS, 0, my_core_id,
caps_locate_slot(CNODE(st->pagecn), pagecn_pagemap++));
#endif
// Map PDIR into successive slots in pagecn
for(size_t i = 0; i < INIT_PDIR_SIZE; i++) {
caps_create_new(ObjType_VNode_x86_32_pdir,
mem_to_local_phys((lvaddr_t)init_pdir) + i * BASE_PAGE_SIZE,
- BASE_PAGE_BITS, 0,
+ BASE_PAGE_BITS, 0, my_core_id,
caps_locate_slot(CNODE(st->pagecn), pagecn_pagemap++));
}
// Map page tables into successive slots in pagecn
for(size_t i = 0; i < INIT_PTABLE_SIZE; i++) {
caps_create_new(ObjType_VNode_x86_32_ptable,
mem_to_local_phys((lvaddr_t)init_ptable) + i * BASE_PAGE_SIZE,
- BASE_PAGE_BITS, 0,
+ BASE_PAGE_BITS, 0, my_core_id,
caps_locate_slot(CNODE(st->pagecn), pagecn_pagemap++));
}
// Connect all page tables to page directories.
// Map IO cap in task cnode
struct cte *iocap = caps_locate_slot(CNODE(st->taskcn), TASKCN_SLOT_IO);
- err = caps_create_new(ObjType_IO, 0, 0, 0, iocap);
+ err = caps_create_new(ObjType_IO, 0, 0, 0, my_core_id, iocap);
assert(err_is_ok(err));
/* Set fields in DCB */
// XXX: Create as devframe so the memory is not zeroed out
err = caps_create_new(ObjType_DevFrame, core_data->urpc_frame_base,
core_data->urpc_frame_bits,
- core_data->urpc_frame_bits, urpc_frame_cte);
+ core_data->urpc_frame_bits, core_data->src_core_id,
+ urpc_frame_cte);
assert(err_is_ok(err));
urpc_frame_cte->cap.type = ObjType_Frame;
lpaddr_t urpc_ptr = gen_phys_to_local_phys(urpc_frame_cte->cap.u.frame.base);