X-Git-Url: http://git.barrelfish.org/?p=barrelfish;a=blobdiff_plain;f=kernel%2Farch%2Fx86%2Fstartup_x86.c;h=2b37549a416ece0994fdbfd3506b22f2631bd8ec;hp=616fe960576de228bab4a7f39038803d44706cd2;hb=0036d2fa62f001554d7bf5f36195ba2a3854b59d;hpb=c1cb52456a49b5a61cf726ca25438f7162b92196

diff --git a/kernel/arch/x86/startup_x86.c b/kernel/arch/x86/startup_x86.c
index 616fe96..2b37549 100644
--- a/kernel/arch/x86/startup_x86.c
+++ b/kernel/arch/x86/startup_x86.c
@@ -38,6 +38,7 @@
 #include <arch/x86/apic.h>
 #include <target/x86/barrelfish_kpi/coredata_target.h>
 #include <arch/x86/startup_x86.h>
+#include <dev/ia32_dev.h>
 
 #ifdef __scc__
 #       include <rck.h>
@@ -632,3 +633,24 @@ void kernel_startup(void)
     //}
     panic("Error spawning init!");
 }
+
+/*
+ * Configure the IA32_PAT_MSR register such that PA4 is write-combining and
+ * PA5 is write-protect.
+ */
+void configure_page_attribute_table(void)
+{
+    ia32_t ia32;
+    ia32_cr_pat_t pat;
+
+    ia32_initialize(&ia32);
+
+    pat = ia32_cr_pat_rd(&ia32);
+
+    pat = ia32_cr_pat_pa4_insert(pat, ia32_wc);
+    pat = ia32_cr_pat_pa5_insert(pat, ia32_wp);
+
+    ia32_cr_pat_wr(&ia32, pat);
+
+    debug(SUBSYS_STARTUP, "Configured IA32_PAT_MSR.\n");
+}