Multicore support for the Xeon Phi

Multicore support for the Xeon Phi

- Adapted the xapic.dev to account for the special register layout in
icr and id register
- added switches to use alternative register layout in apic.c
- added APIC and FLASH memoryhole in mmap
- Bugfix: Wrong CPU information (cpu_arch.h)
- Added: delay_ms assembly that stalls the CPU some time (needed for
booting the cores)
- Some fixes with memory offsets in startu parch
- Added: support for pagetables that map MMIO range of the xeon phi in
init_ap.S
- Added Delays in start_aps
- Adpted offset in entry.S fo match for the new layout
- Removed Global Flag for the valid page table bits
- Disabled activation of MMX