Added basic support for the Cortex A9 Global Timer
authorSebastian Wicki <swicki@student.ethz.ch>
Tue, 4 Feb 2014 23:11:20 +0000 (00:11 +0100)
committerSebastian Wicki <swicki@student.ethz.ch>
Tue, 4 Feb 2014 23:11:20 +0000 (00:11 +0100)
commitc8d0fa0bbfb8b9c1bd8ca5e66366a6ae7b156d0a
treea66b85c39d7db727307f0b5556993ba9d63286b8
parentf6b89c2bce5fd0262d1ec896b8af9765a10b9e00
Added basic support for the Cortex A9 Global Timer

The Cortex A9 global timer is a 64-bit incrementing counter, which
is memory mapped in the private memory region. Thus, the code for
the timer is currently all in the CPU driver.

To read out the timer in userspace, two system calls are needed,
one for the lower and and one for the upper half of the counter.
The following helper function is provided to correctly read out
the timer value in two 32 bit reads as suggested in the ARM TRM:

  errval_t sys_debug_hardware_global_timer_read(uint64_t *ret)
devices/Hakefile
devices/cortex_a9_gt.dev [new file with mode: 0644]
include/barrelfish/sys_debug.h
include/barrelfish_kpi/sys_debug.h
kernel/Hakefile
kernel/arch/armv7/syscall.c
kernel/arch/omap44xx/init.c
kernel/arch/omap44xx/omap.c
kernel/include/arch/armv7/arm_hal.h
lib/barrelfish/arch/arm/sys_debug.c