Added basic support for the Cortex A9 Global Timer

Added basic support for the Cortex A9 Global Timer

The Cortex A9 global timer is a 64-bit incrementing counter, which
is memory mapped in the private memory region. Thus, the code for
the timer is currently all in the CPU driver.

To read out the timer in userspace, two system calls are needed,
one for the lower and and one for the upper half of the counter.
The following helper function is provided to correctly read out
the timer value in two 32 bit reads as suggested in the ARM TRM:

  errval_t sys_debug_hardware_global_timer_read(uint64_t *ret)