constants system_page "System Page Constants" {
system_page_size = 0x400000000 "Size of a System Memory Page (16GB)";
- system_page_num = 16 "The number of system memory pages";
+ system_page_num = 32 "The number of system memory pages";
system_page_shift = 34 "The amount of bits to shift";
system_page_mask = 0x1F "System memory page mask";
};
failure NOT_VIRTIO_DEVICE "The device is not a VirtIO device",
failure VERSION_MISMATCH "The VirtIO versions do mismatch",
failure DEVICE_STATUS "VirtIO device has the wrong status",
- failure DEVICE_TYPE "The VirtIO device is not of the expected type",
+ failure DEVICE_TYPE "The VirtIO device is not of the expected type",
failure DEVICE_IDLE "The VirtIO device is idle. No new requests.",
failure QUEUE_ACTIVE "The selected qeueue is already activated",
failure QUEUE_INVALID "The selected queue does not exist",
failure BLK_REQ_IOERR "The request ended in an IO error",
failure BLK_REQ_UNSUP "The request type was not supported",
};
+
+errors xeon_phi XEON_PHI_ERR_ {
+ failure DMA_ID_NOT_EXISTS "The DMA transfer with that ID does not exist ",
+ failure DMA_BUSY "All DMA channels are busy",
+ failure DMA_MEM_REGISTERED "The memory has not been registered",
+};
"xeon_phi",
"xeon_phi_manager",
"xeon_phi_messaging",
+ "xeon_phi_dma",
"virtio",
"block_service",
"bulk_ctrl",
interface xeon_phi "Xeon Phi Service Interface" {
rpc register(in uint8 id, out errval msgerr);
-
- message dma_register_memory(capref cap);
+
};
\ No newline at end of file
--- /dev/null
+/** \file
+ * \brief Xeon Phi Service Interface
+ */
+
+/*
+ * Copyright (c) 2012, ETH Zurich.
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached LICENSE file.
+ * If you do not find this file, copies can be found by writing to:
+ * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
+ */
+
+interface xeon_phi_dma "Xeon Phi DMA Interface" {
+
+ typedef uint32 id;
+
+ /**
+ * \brief registers a memory region to be used for DMA transfers
+ *
+ * \param IN memory the memory region to register
+ * \param OUT msgerr the result of the operation
+ *
+ * Note: either local or remote memory must be registered
+ */
+ rpc register(in cap memory, out errval msgerr);
+
+
+ /**
+ * \brief deregisters a memory region to be used for DMA transfers
+ *
+ * \param IN memory the memory region to register
+ * \param OUT msgerr the result of the operation
+ *
+ * Note: either local or remote memory must be registered
+ */
+ rpc deregister(in cap memory, out errval msgerr);
+
+ /**
+ * \brief issues a new DMA transfer request to the Xeon Phi DMA controller
+ *
+ * \param IN src source address for the transfer
+ * \param IN dsc destination address of the transfer
+ * \param IN length size of the transfer in bytes
+ * \param OUT err result of the transfer request
+ * \param OUT id returns the id of the transfer
+ */
+ rpc exec(in uint64 src, in uint64 dst, in uint64 length,
+ out errval err, out id id);
+
+ /**
+ * \brief stops a initiated DMA transfer
+ *
+ * \param IN id the id of the completed transfer
+ * \param OUT err the result of
+ */
+ rpc stop(in id id, out errval err);
+
+ /**
+ * \brief DMA transfer done notification
+ *
+ * \param id the id of the completed transfer
+ * \param err the result of the transfer
+ */
+ message done(id id, errval err);
+
+};
\ No newline at end of file
--- /dev/null
+/*
+ * Copyright (c) 2014 ETH Zurich.
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached LICENSE file.
+ * If you do not find this file, copies can be found by writing to:
+ * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
+ */
+
+#ifndef XEON_PHI_DMA_H
+#define XEON_PHI_DMA_H
+
+
+#define XEON_PHI_DMA_SERVICE_NAME "xeon_phi_dma_svc"
+
+
+
+
+
+#endif // XEON_PHI_DMA_H
--- /dev/null
+/*
+ * Copyright (c) 2014 ETH Zurich.
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached LICENSE file.
+ * If you do not find this file, copies can be found by writing to:
+ * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
+ */
+
+#ifndef XEON_PHI_DMA_CLIENT_H
+#define XEON_PHI_DMA_CLIENT_H
+
+/* for xeon_phi_dma_id_t */
+#include <if/xeon_phi_dma_defs.h>
+
+/**
+ * type definition of the xeon phi done callback
+ */
+typedef void (*xeon_phi_dma_done_t)(xeon_phi_dma_id_t id,
+ errval_t err,
+ void *st);
+
+/**
+ * specifies the information about a DMA transfer
+ */
+struct xeon_phi_dma_info
+{
+ lpaddr_t src;
+ lpaddr_t dest;
+ size_t size;
+};
+
+/**
+ * Continuation to be called when the DMA transfer is completed
+ */
+struct xeon_phi_dma_cont
+{
+ xeon_phi_dma_done_t cb;
+ void *arg;
+};
+
+/**
+ * initializes the XEON Phi DMA client library
+ *
+ * \returns SYS_ERR_OK on success
+ * XEON_PHI_ERR_DMA_* on error
+ */
+errval_t xeon_phi_dma_client_init(void);
+
+/**
+ * \brief registers a physical memory region to be used for DMA transfers
+ * this memory region can be in host or card memory
+ *
+ * \param xphi_id id of the xeon phi
+ * \param mem the memory to be registered
+ *
+ * \returns SYS_ERR_OK on success
+ * XEON_PHI_ERR_DMA_* on error
+ */
+errval_t xeon_phi_dma_client_register(uint8_t xphi_id,
+ struct capref mem);
+
+/**
+ * \brief deregisters a physical memory region to be used for DMA transfers
+ * this memory region can be in host or card memory
+ *
+ * \param xphi_id id of the xeon phi
+ * \param mem the memory to be deregistered
+ *
+ * \returns SYS_ERR_OK on success
+ * XEON_PHI_ERR_DMA_* on error
+ *
+ * NOTE: this prevents the memory region from being used in future requests
+ * current active DMA transfers using this memory regions are not stopped.
+ */
+errval_t xeon_phi_dma_client_deregister(uint8_t xphi_id,
+ struct capref mem);
+
+/**
+ * \brief starts a new DMA transfer
+ *
+ * \param xphi_id id of the xeon phi
+ * \param info pointer to the DMA transfer info structure
+ * \param cont continuation to be called when transfer is done
+ * \param id returns the ID of the transfer
+ *
+ * \returns SYS_ERR_OK on success
+ * XEON_PHI_ERR_DMA_* on error
+ */
+errval_t xeon_phi_dma_client_start(uint8_t xphi_id,
+ struct xeon_phi_dma_info *info,
+ struct xeon_phi_dma_cont cont,
+ xeon_phi_dma_id_t *id);
+
+/**
+ * \brief executes a DMA transfer and waits for its completion
+ *
+ * \param xphi_id id of the xeon phi
+ * \param info pointer to the DMA transfer info structure
+ *
+ * \returns SYS_ERR_OK on success
+ * XEON_PHI_ERR_DMA_* on error
+ */
+errval_t xeon_phi_dma_client_exec(uint8_t xphi_id,
+ struct xeon_phi_dma_info *info);
+
+
+/**
+ *
+ */
+errval_t xeon_phi_dma_client_stop(xeon_phi_dma_id_t id);
+
+
+
+#endif // XEON_PHI_DMA_CLIENT_H
flounderDefs = ["xeon_phi_messaging"],
flounderBindings = ["xeon_phi_messaging"],
architectures = ["k1om", "x86_64"]
- }
+ },
+ build library { target = "xeon_phi_dma_client",
+ cFiles = [ "xeon_phi_dma_client.c" ],
+ flounderDefs = ["xeon_phi_dma"],
+ flounderBindings = ["xeon_phi_dma"],
+ architectures = ["k1om", "x86_64"]
+ }
]
--- /dev/null
+/*
+ * Copyright (c) 2014 ETH Zurich.
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached LICENSE file.
+ * If you do not find this file, copies can be found by writing to:
+ * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
+ */
+
+#include <string.h>
+#include <barrelfish/barrelfish.h>
+#include <barrelfish/nameservice_client.h>
+
+typedef void (*xeon_phi_dma_done_t)(void);
+
+
+#define XEON_PHI_DMA_ALIGNMENT 64
+#define XEON_PHI_DMA_GRANULARITY 64
+
+struct xeon_phi_dma_chan
+{
+
+};
+
+/**
+ * represents a DMA request which is currently being executed
+ */
+struct xeon_phi_dma_request
+{
+ lpaddr_t from;
+ lpaddr_t to;
+ size_t length;
+ void *st;
+ xeon_phi_dma_done_t cb;
+ struct xeon_phi_dma_request *next;
+ struct xeon_phi_dma_request *prev;
+};
+
+#define XEON_PHI_DMA_MEM_HOST 1
+#define XEON_PHI_DMA_MEM_CARD 2
+
+/**
+ * stores the memory information about the registered memory
+ */
+struct xeon_phi_dma_mem
+{
+ lpaddr_t base;
+ size_t size;
+ struct capref *cap;
+ uint8_t type;
+ struct xeon_phi_dma_mem *next;
+};
+
+static struct xeon_phi_dma_mem *dma_mem;
+
+static bool verify_address(lpaddr_t base, size_t size)
+{
+ if (dma_mem == NULL) {
+ return 0;
+ }
+
+ static struct xeon_phi_dma_mem *mem = dma_mem;
+
+ while(mem) {
+ if (mem->base > base) {
+ return 0;
+ }
+ if (mem->base <= base
+ && (base + size) <= (mem->base +mem->size)) {
+ return 1;
+ }
+ mem = mem->next;
+ }
+
+ return 0;
+}
+
+/**
+ * \brief initializes the DMA library
+ */
+errval_t xeon_phi_dma_init(void);
+
+/**
+ * \brief opens a new DMA channel
+ *
+ * all descriptor rings owned by the host driver must exist
+ * in system memory while rings owned by the coprocessor OS must
+ * exist in GDDR5 memory.
+ */
+errval_t xeon_phi_dma_chan_open(struct xeon_phi_dma_chan **chan);
+
+
+/**
+ * \brief closes an opened DMA channel
+ */
+errval_t xeon_phi_dma_chan_close(struct xeon_phi_dma_chan *chan);
+
+errval_t xeon_phi_dma_register_memory(struct capref cap);
+
+errval_t xeon_phi_dma_deregister_memory(struct capref cap);
+
+errval_t xeon_phi_dma_exec();
+
+errval_t xeon_phi_dma_stop();
--- /dev/null
+/*
+ * Copyright (c) 2014 ETH Zurich.
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached LICENSE file.
+ * If you do not find this file, copies can be found by writing to:
+ * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
+ */
+
+#include <string.h>
+#include <barrelfish/barrelfish.h>
+#include <barrelfish/nameservice_client.h>
+
+#include <xeon_phi/xeon_phi.h>
+
+#include <xeon_phi/xeon_phi_dma.h>
+#include <xeon_phi/xeon_phi_dma_client.h>
+
+#include <if/xeon_phi_dma_defs.h>
+
+/// The maximum number of concurrent DMA requests
+#define REQUESTS_COUNT_MAX 16
+
+struct xdma_req
+{
+ xeon_phi_dma_id_t id;
+ struct xeon_phi_dma_cont cont;
+ struct xdma_req *next;
+ struct xdma_req *prev;
+};
+
+#ifdef __k1om__
+/// service iref
+static iref_t xdma_svc_iref;
+
+/// service binding
+struct xeon_phi_dma_binding *xdma_binding;
+
+/// wait reply flag for RPC like functionality where needed
+uint8_t xdma_wait_reply = 0;
+#else
+/// service irefs
+static iref_t xdma_svc_iref[XEON_PHI_NUM_MAX];
+
+/// service bindings
+struct xeon_phi_dma_binding *xdma_binding[XEON_PHI_NUM_MAX];
+
+/// wait reply flags for RPC like functionality where needed
+uint8_t xdma_wait_reply[XEON_PHI_NUM_MAX]
+#endif
+
+
+/// pointer to all DMA requests
+static struct xdma_req *requests;
+
+/// the current requests being executed
+static struct xdma_req *requests_pending;
+
+/// the number of pending requests
+static uint32_t requests_pending_count;
+
+/// unused / free requests
+static struct xdma_req *requests_free;
+
+/// the number of free requests
+static uint32_t requests_free_count;
+
+
+
+#define DEBUG_XDMA(x...) debug_printf(" [xdma] " x)
+
+enum xpm_state
+{
+ XPM_STATE_NSLOOKUP,
+ XPM_STATE_BINDING,
+ XPM_STATE_BIND_OK,
+ XPM_STATE_BIND_FAIL,
+};
+
+static enum xpm_state conn_state = XPM_STATE_NSLOOKUP;
+
+/*
+ * forward declarations for the recv messages
+ */
+
+
+struct xeon_phi_dma_rx_vtbl xdma_rx_vtbl = {
+ .register_call = NULL
+};
+
+/**
+ * \brief
+ *
+ * \param
+ * \param
+ * \param
+ */
+static void xdma_bind_cb(void *st,
+ errval_t err,
+ struct xeon_phi_dma_binding *b)
+{
+
+ if (err_is_fail(err)) {
+ conn_state = XPM_STATE_BIND_FAIL;
+ return;
+ }
+
+ b->rx_vtbl = xdma_rx_vtbl;
+#ifdef __k1om__
+ xdma_binding = b;
+#else
+ uint8_t xphi_id = (uint8_t)(uintptr_t)st;
+ xdma_binding[xphi_id] = b;
+#endif
+ DEBUG_XDMA("Binding to xdma service ok.\n");
+
+ conn_state = XPM_STATE_BIND_OK;
+}
+
+/**
+ * \brief
+ */
+#ifdef __k1om__
+static errval_t xdma_connect(void)
+{
+ errval_t err;
+
+ if (xdma_binding != NULL) {
+ return SYS_ERR_OK;
+ }
+
+#else
+static errval_t xdma_connect(uint8_t xphi_id)
+{
+ errval_t err;
+
+ if (xdma_binding[xphi_id] != NULL) {
+ return SYS_ERR_OK;
+ }
+
+#endif
+
+ char buf[50];
+#if !defined(__k1om__)
+ snprintf(buf, 50, "%s.%u", XEON_PHI_DMA_SERVICE_NAME, xphi_id);
+#else
+ snprintf(buf, 50, "%s", XEON_PHI_DMA_SERVICE_NAME);
+#endif
+
+ iref_t svc_iref;
+
+ DEBUG_XDMA("Nameservice lookup: %s\n", buf);
+ err = nameservice_blocking_lookup(buf, &svc_iref);
+ if (err_is_fail(err)) {
+ return err;
+ }
+
+ conn_state = XPM_STATE_BINDING;
+
+ DEBUG_XDMA("binding to iref [%u]... \n", svc_iref);
+#ifdef __k1om__
+ xdma_svc_iref = svc_iref;
+ err = xeon_phi_dma_bind(xdma_svc_iref, xdma_bind_cb,
+ NULL,
+ get_default_waitset(),
+ IDC_BIND_FLAGS_DEFAULT);
+#else
+ xdma_svc_iref[xphi_id] = svc_iref;
+ err = xeon_phi_dma_bind(svc_iref, xdma_bind_cb,
+ (void *)(uintptr_t)xphi_id,
+ get_default_waitset(),
+ IDC_BIND_FLAGS_DEFAULT);
+#endif
+ if (err_is_fail(err)) {
+ return err;
+ }
+
+ while (conn_state == XPM_STATE_BINDING) {
+ messages_wait_and_handle_next();
+ }
+
+ if (conn_state == XPM_STATE_BIND_FAIL) {
+ return FLOUNDER_ERR_BIND;
+ }
+
+ return SYS_ERR_OK;
+}
+
+/**
+ * initializes the XEON Phi DMA client library
+ *
+ * \returns SYS_ERR_OK on success
+ * XEON_PHI_ERR_DMA_* on error
+ */
+errval_t xeon_phi_dma_client_init(void)
+{
+ requests = calloc(REQUESTS_COUNT_MAX, sizeof(*requests));
+ if (!requests) {
+ return LIB_ERR_MALLOC_FAIL;
+ }
+
+ struct xdma_req *req = requests;
+ for (uint32_t i = 0; i < REQUESTS_COUNT_MAX - 1; ++i) {
+ req->next = req + 1;
+ req++;
+ }
+
+ requests_free = requests;
+ requests_free_count = REQUESTS_COUNT_MAX;
+
+ requests_pending = NULL;
+ requests_pending_count = 0;
+
+ return SYS_ERR_OK;
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ * DMA register a new memory region to be used
+ * ---------------------------------------------------------------------------
+ */
+
+struct xdma_reg_msg_st
+{
+
+
+};
+
+
+/**
+ * \brief registers a physical memory region to be used for DMA transfers
+ * this memory region can be in host or card memory
+ *
+ * \param xphi_id id of the xeon phi
+ * \param mem the memory to be registered
+ *
+ * \returns SYS_ERR_OK on success
+ * XEON_PHI_ERR_DMA_* on error
+ */
+errval_t xeon_phi_dma_client_register(uint8_t xphi_id,
+ struct capref mem)
+{
+ errval_t err = SYS_ERR_OK;
+ struct xeon_phi_dma_binding *bind;
+
+#ifdef __k1om__
+ if (xdma_binding == NULL) {
+ err = xdma_connect();
+ }
+ bind = xdma_binding;
+#else
+ if (xdma_binding[xphi_id] == NULL) {
+ err = xdma_connect(xphi_id);
+ }
+ bind = xdma_binding[xphi_id];
+#endif
+ if(err_is_fail(err)) {
+ return err;
+ }
+
+ return SYS_ERR_OK;
+}
+
+
+
+/*
+ * ---------------------------------------------------------------------------
+ * DMA deregister memory
+ * ---------------------------------------------------------------------------
+ */
+
+struct xdma_dereg_msg_st
+{
+
+
+};
+
+
+/*
+ * ---------------------------------------------------------------------------
+ * DMA start new transfer
+ * ---------------------------------------------------------------------------
+ */
+struct xdma_reg_start_st
+{
+
+
+};
+
+/*
+ * ---------------------------------------------------------------------------
+ * DMA stop transfer
+ * ---------------------------------------------------------------------------
+ */
+
+struct xdma_reg_stop_st
+{
+
+
+};
+
+/*
+ * ---------------------------------------------------------------------------
+ * DMA dma execute transfer
+ * ---------------------------------------------------------------------------
+ */
+
+struct xdma_reg_exec_st
+{
+
+
+};
+
+
+/**
+ * \brief executes a DMA transfer and waits for its completion
+ *
+ * \param xphi_id id of the xeon phi
+ * \param info pointer to the DMA transfer info structure
+ *
+ * \returns SYS_ERR_OK on success
+ * XEON_PHI_ERR_DMA_* on error
+ */
+errval_t xeon_phi_dma_client_exec(uint8_t xphi_id,
+ struct xeon_phi_dma_info *info)
+{
+
+}
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ * DMA transfer done
+ * ---------------------------------------------------------------------------
+ */
+
+
static iref_t xpm_iref[XEON_PHI_NUM_MAX];
struct xeon_phi_messaging_binding *xpm_binding[XEON_PHI_NUM_MAX];
-enum xpm_state conn_state = XPM_STATE_NSLOOKUP;
+static enum xpm_state conn_state = XPM_STATE_NSLOOKUP;
/*
* --------------------------------------------------------------------------
}
-struct xeon_phi_messaging_rx_vtbl xpm_rx_vtbl = {
+static struct xeon_phi_messaging_rx_vtbl xpm_rx_vtbl = {
.open = NULL
};
[ build application { target = "xeon_phi_test",
cFiles = [ "main_host.c", "benchmark.c" ],
flounderDefs = ["xeon_phi_messaging"],
- addLibraries = libDeps [ "xeon_phi_messaging", "xeon_phi_messaging_client", "bench" ],
+ addLibraries = libDeps [ "xeon_phi_messaging", "xeon_phi_messaging_client", "bench", "xeon_phi_dma_client" ],
architectures = ["x86_64"]
},
errval_t xphi_bench_memwrite(void *target)
{
+ return SYS_ERR_OK;
+
debug_printf("Executing local measurements\n");
errval_t err;
uint32_t rep_counter = 0;
do {
debug_printf(" > run %u of %u memwrite of %lu byt.es..\n", rep_counter++,
- XPHI_BENCH_NUM_REPS, XPHI_BENCH_BUF_FRAME_SIZE);
+ XPHI_BENCH_NUM_REPS,
+ XPHI_BENCH_BUF_FRAME_SIZE);
/* using memset */
tsc_start = rdtsc();
/* reading in a while loop */
buf = target;
- buf[XPHI_BENCH_BUF_FRAME_SIZE-1] = 0;
+ buf[XPHI_BENCH_BUF_FRAME_SIZE - 1] = 0;
tsc_start = rdtsc();
- while(*(buf++))
+ while (*(buf++))
;
result[2] = rdtsc() - tsc_start - bench_tscoverhead();
-
} while (!bench_ctl_add_run(ctl, result));
// bench_ctl_dump_csv(ctl, "", tscperus);
avg_s /= 1000000;
xphi_bench_print_settings();
// bench_ctl_dump_csv(ctl, "", tscperus);
- bench_ctl_dump_analysis(ctl, 0, "Sync Throughput", tscperus);
+ bench_ctl_dump_analysis(ctl, 0, "RTT", tscperus);
return SYS_ERR_OK;
}
//#define XPHI_BENCH_THROUGHPUT 1
/// enables the processing on the card instead of the host
-//#define XPHI_BENCH_PROCESS_CARD 1
+#define XPHI_BENCH_PROCESS_CARD 1
/// enables the waiting for a reply instead of keeping sending
//#define XPHI_BENCH_SEND_SYNC 1
//#define XPHI_BENCH_CHAN_HOST 1
/// reverses the in/out buffers if they are located on card and host
-//#define XPHI_BENCH_CHAN_REVERSED 1
+#define XPHI_BENCH_CHAN_REVERSED 1
/*
/// how many buffers we have (we keep it consistent with the number of messages
#define XPHI_BENCH_BUF_NUM XPHI_BENCH_MSG_NUM
/// the size of a single buffer
-#define XPHI_BENCH_BUF_SIZE (1UL<<14)
+#define XPHI_BENCH_BUF_SIZE (1UL << 14)
/// the resulting size of the buffer frame we have to allocate
#define XPHI_BENCH_BUF_FRAME_SIZE (XPHI_BENCH_BUF_NUM * XPHI_BENCH_BUF_SIZE)
+++ /dev/null
-/*
- * Copyright (c) 2014 ETH Zurich.
- * All rights reserved.
- *
- * This file is distributed under the terms in the attached LICENSE file.
- * If you do not find this file, copies can be found by writing to:
- * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
- */
-#include <stdio.h>
-#include <barrelfish/barrelfish.h>
-#include <barrelfish/nameservice_client.h>
-
-#include <if/xeon_phi_messaging_defs.h>
-
-#include "service.h"
-
-enum xpm_svc_state
-{
- XPM_SVC_STATE_EXPORTING,
- XPM_SVC_STATE_EXPORT_OK,
- XPM_SVC_STATE_EXPORT_FAIL,
- XPM_SVC_STATE_NS_REGISTERING,
- XPM_SVC_STATE_NS_REGISTER_OK,
- XPM_SVC_STATE_NS_REGISTER_FAIL,
- XPM_SVC_STATE_RUNNING
-};
-
-static enum xpm_svc_state svc_state = XPM_SVC_STATE_EXPORTING;
-
-static iref_t messaging_iref;
-
-static void
-open_call_rx(struct xeon_phi_messaging_binding *_binding,
- struct capref msgframe,
- uint8_t type)
-{
- errval_t err;
-
- DEBUG_SVC("Received channel open request\n");
-
- struct frame_identity id;
- err = invoke_frame_identify(msgframe, &id);
- if (err_is_fail(err)) {
- USER_PANIC_ERR(err, "could not identify the frame");
- }
-
- DEBUG_SVC("Frame base: %016lx, size=%lx\n", id.base, 1UL << id.bits);
-}
-
-static struct xeon_phi_messaging_rx_vtbl xpm_rx_vtbl = { .open = open_call_rx };
-
-/*
- * --------------------------------------------------------------------------
- * Export and Connect functions
- */
-
-static errval_t
-svc_connect_cb(void *st,
- struct xeon_phi_messaging_binding *b)
-{
- DEBUG_SVC("connect request\n");
- b->rx_vtbl = xpm_rx_vtbl;
-
- return SYS_ERR_OK;
-}
-
-/**
- * \brief
- */
-static void
-svc_export_cb(void *st,
- errval_t err,
- iref_t iref)
-{
- DEBUG_SVC("exported\n");
- if (err_is_fail(err)) {
- svc_state = XPM_SVC_STATE_EXPORT_FAIL;
- return;
- }
-
- messaging_iref = iref;
-
- svc_state = XPM_SVC_STATE_NS_REGISTERING;
-
- err = nameservice_register((const char *) st, iref);
- if (err_is_fail(err)) {
- svc_state = XPM_SVC_STATE_NS_REGISTER_FAIL;
- }
- DEBUG_SVC("ns registered\n");
- svc_state = XPM_SVC_STATE_NS_REGISTER_OK;
-}
-
-/**
- * \brief starts Xeon Phi manager service
- *
- * \return SYS_ERR_OK on succes
- */
-errval_t
-service_start(char *iface)
-{
-
- DEBUG_SVC("starting service...\n");
- errval_t err;
-
- struct waitset *ws = get_default_waitset();
-
- err = xeon_phi_messaging_export(iface, svc_export_cb, svc_connect_cb, ws,
- IDC_EXPORT_FLAGS_DEFAULT);
- if (err_is_fail(err)) {
- return err;
- }
-
- while (svc_state == XPM_SVC_STATE_EXPORTING) {
- messages_wait_and_handle_next();
- }
-
- if (svc_state == XPM_SVC_STATE_EXPORT_FAIL) {
- return FLOUNDER_ERR_BIND;
- } else if (svc_state == XPM_SVC_STATE_NS_REGISTER_FAIL) {
- return LIB_ERR_NAMESERVICE_CLIENT_INIT;
- }
-
- DEBUG_SVC("Service up and running.\n");
-
- svc_state = XPM_SVC_STATE_RUNNING;
- messages_handler_loop();
-
- DEBUG_SVC("Message handler terminated.\n");
-
- return SYS_ERR_OK;
-
-}
-
+++ /dev/null
-/*
- * Copyright (c) 2014 ETH Zurich.
- * All rights reserved.
- *
- * This file is distributed under the terms in the attached LICENSE file.
- * If you do not find this file, copies can be found by writing to:
- * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
- */
-
-#ifndef XEON_PHI_MANAGER_SERVICE_H_
-#define XEON_PHI_MANAGER_SERVICE_H_
-
-
-#define XEON_PHI_TEST_HOST_NAME "xp_msg_host"
-#define XEON_PHI_TEST_CARD_NAME "xp_msg_card"
-
-#define DEBUG_SVC(x...) debug_printf("SVC | " x);
-//#define DEBUG_SVC(x...)
-
-/**
- * \brief starts Xeon Phi manager service
- *
- * \return SYS_ERR_OK on succes
- */
-errval_t service_start(char *iface);
-
-
-
-
-#endif /* SERVICE_H_ */
projects / barrelfish / commitdiff