ARMv8: adding system register CPACR_EL1 to the device file

Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>

diff --git a/devices/armv8.dev b/devices/armv8.dev
index c9f0f5b..b271b99 100644 (file)
--- a/devices/armv8.dev
+++ b/devices/armv8.dev
@@ -304,6 +304,20 @@ device armv8 msbfirst () "ARMv8 architecture registers" {
         M        1 "MMU enable";
     };
 
+    constants fpen width(1) "Endianness configuration" {
+        fpen_trap_any  = 0b00 "Trap any FP and SIMD instructions in EL0 or EL1";
+        fpen_trap_el0  = 0b01 "Trap any FP and SIMD in EL0 to EL21";
+        fpen_trap_el1  = 0b10 "Trap any FP and SIMD instructions in EL0 or EL1";
+        fpen_trap_none = 0b11 "Does not cause any instruction to be trapped.";
+    };
+
+    register CPACR_EL1 rw sysreg(CPACR_EL1) "Architectural Feature Access Control Register" {
+        _        3 mbz;
+        TTA      1 "Traps EL0 and EL1 System register accesses to all implemented trace registers to EL1";
+        _        6 mbz;
+        FPEN     2 type(endianness) "Traps EL0 and EL1 accesses to the SIMD and floating-point registers to EL1";
+        _       20 mbz;
+    };
 
     register ICC_AP0R0_EL1 rw sysreg(ICC_AP0R0_EL1) "" {
         impl    32;

diff --git a/kernel/arch/armv8/boot.c b/kernel/arch/armv8/boot.c
index 6791eba..f3a9b50 100644 (file)
--- a/kernel/arch/armv8/boot.c
+++ b/kernel/arch/armv8/boot.c
@@ -215,6 +215,11 @@ void boot_app_init(lpaddr_t state)
 
     uint8_t current_el = get_current_el();
 
+    if (current_el == 2) {
+        uint64_t zero = 0;
+        __asm volatile("MSR CPTR_EL2, %[zero]" : : [zero] "r" (zero));
+    }
+
     /* disable interrupts */
     armv8_disable_interrupts();
 
@@ -331,6 +336,9 @@ boot_bsp_init(uint32_t magic, lpaddr_t pointer, lpaddr_t stack) {
         /* disable traps to EL2 for timer accesses */
         uint32_t cnthctl = sysreg_read_cnthctl_el2();
         sysreg_write_cnthctl_el2(cnthctl | 0x3);
+
+        /* disable traps for FP/SIMD access  */
+        armv8_CPACR_EL1_FPEN_wrf(NULL, armv8_fpen_trap_none);
     }
 
     if (el == 3) {

diff --git a/kernel/arch/armv8/sysreg.S b/kernel/arch/armv8/sysreg.S
index 0e4e3cf..fda8292 100644 (file)
--- a/kernel/arch/armv8/sysreg.S
+++ b/kernel/arch/armv8/sysreg.S
@@ -202,6 +202,7 @@ sysreg_rw 32 TCR_EL2            TCR_EL2
 sysreg_rw 32 SCTLR_EL1          SCTLR_EL1
 sysreg_rw 32 SCTLR_EL2          SCTLR_EL2
 sysreg_rw 32 SCTLR_EL3          SCTLR_EL3
+sysreg_rw 32 CPACR_EL1          CPACR_EL1
 sysreg_rw 32 ICC_PMR_EL1        S3_0_C4_C6_0
 sysreg_ro 32 ICC_IAR0_EL1       S3_0_C12_C8_0
 sysreg_wo 32 ICC_EOIR0_EL1      S3_0_C12_C8_1