"-Wshadow",
"-Wmissing-declarations",
"-Wmissing-field-initializers",
+ "-Wtype-limits",
"-Wredundant-decls",
"-Werror" ] ]
#define PRIxCOREID PRIx8
#ifndef MAX_COREID
-#define MAX_COREID 255 // limit of coreid_t type (see comment above)
+#define MAX_COREID 254 // limit of coreid_t type (see comment above)
#endif
/* node id type */
e10k_q_tdesc_adv_rd_ifcs_insert(d, 1);
e10k_q_tdesc_adv_rd_eop_insert(d, last);
- if (ctx != -1U) {
+ if (ctx != (uint8_t)-1) {
e10k_q_tdesc_adv_rd_idx_insert(d, ctx);
e10k_q_tdesc_adv_rd_cc_insert(d, 1);
e10k_q_tdesc_adv_rd_ixsm_insert(d, ixsm);
uint64_t thc_seq_ticket(thc_seq_t *seq) {
#ifdef _MSC_VER
- C_ASSERT(sizeof(LONGLONG) == sizeof(seq->n));\r
+ C_ASSERT(sizeof(LONGLONG) == sizeof(seq->n));
return InterlockedIncrement64(reinterpret_cast<volatile LONGLONG*>(&seq->n)) - 1;
#else
uint64_t result;
break;
}
} while(1);
- assert((result >= 0) && "URK! Sequencer wrapped");
return result;
#endif
}
}
assert(device < PCI_NDEVICES);
- assert(prt->Pin >= 0 && prt->Pin < PCI_NINTPINS);
+ assert(prt->Pin < PCI_NINTPINS);
char *esource = calloc(strlen(prt->Source) * 2, 1);
for(int i = 0, j = 0; i < strlen(prt->Source) + 1; i++, j++) {
{
AHCID_DEBUG("got list call\n");
uint8_t port;
- uint8_t current_num_ports = (num_ports == -1 ? 0 : num_ports);
+ uint8_t current_num_ports = (num_ports == (uint8_t)-1 ? 0 : num_ports);
uint8_t next_port = 0;
uint8_t *port_ids = malloc(current_num_ports);
for (port = 0; port < current_num_ports; port++) {
e10k_q_tdesc_adv_rd_ifcs_insert(d, 1);
e10k_q_tdesc_adv_rd_eop_insert(d, last);
- if (ctx != -1U) {
+ if (ctx != (uint8_t)-1) {
e10k_q_tdesc_adv_rd_idx_insert(d, ctx);
e10k_q_tdesc_adv_rd_cc_insert(d, 1);
e10k_q_tdesc_adv_rd_ixsm_insert(d, ixsm);
portbase = (uint16_t) x;
} else if (strncmp(argv[i], "irq=", sizeof("irq=") - 1) == 0) {
unsigned long x = strtoul(argv[i] + sizeof("irq=") - 1, NULL, 0);
- if (irq == 0 || irq > 255) {
+ if (irq == 0) {
fprintf(stderr, "Error: invalid IRQ %lu\n", x);
goto usage;
}
EFX_ZERO_OWORD(epp->ep_multicst_hash[0]);
for (idx = 0; idx < 128; idx++) {
if (bucket[idx] != 0)
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wtype-limits"
EFX_SET_OWORD_BIT(epp->ep_multicst_hash[0], idx);
+#pragma GCC diagnostic pop
}
/* Set the upper 128 bits of the hash */
EFX_ZERO_OWORD(epp->ep_multicst_hash[1]);
for (idx = 0; idx < 128; idx++) {
if (bucket[idx + 128] != 0)
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wtype-limits"
EFX_SET_OWORD_BIT(epp->ep_multicst_hash[1], idx);
+#pragma GCC diagnostic pop
}
if ((rc = emop->emo_reconfigure(enp)) != 0)
#include <dev/pci_sr_iov_cap_dev.h>
#include "pci.h"
-#include "driver_mapping.h"
#include "ht_config.h"
#include <dev/ht_config_dev.h>
#include "pci_debug.h"
// Walk capabilities list
while (cap_ptr != 0) {
- assert(cap_ptr % 4 == 0 && cap_ptr >= 0x40
- && cap_ptr < 0x100);
+ assert(cap_ptr % 4 == 0 && cap_ptr >= 0x40);
uint32_t capword = pci_read_conf_header(&addr,
cap_ptr / 4);