--------------------------------------------------------------------------
--- Copyright (c) 2015, ETH Zurich.
+-- Copyright (c) 2017, ETH Zurich.
-- All rights reserved.
--
-- This file is distributed under the terms in the attached LICENSE file.
-- If you do not find this file, copies can be found by writing to:
--- ETH Zurich D-INFK, Universitaetstrasse 4, CH-8092 Zurich. Attn: Systems Group.
+-- ETH Zurich D-INFK, CAB F.78, Universitaetstr. 6, CH-8092 Zurich,
+-- Attn: Systems Group.
--
--- Hakefile for /usr/machinemodel
+-- Hakefile for schema/
--
--------------------------------------------------------------------------
-[
- build library {
- target = "machinemodel",
- sockeyeSchema = [ "pci", "cpuid" ]
- }
-]
+-- whereas these are using the new-style bindings
+[ skateGenSchemas (options arch) f | f <- [
+ "pci",
+ "cpuid"
+ ],
+ arch <- allArchitectures
+]
--- /dev/null
+schema pci "" {
+
+ fact memoryregion "" {
+ uintptr BaseAddress "";
+ uint8 Bits "";
+ uintptr Size "";
+ };
+
+ /* We want to mark this as a non-top level fact */
+ fact addr "" {
+ uint8 bus "";
+ uint8 device "";
+ uint8 function "";
+ };
+
+ fact childbus "" {
+ uint8 min "";
+ uint8 max "";
+ };
+
+ fact mem "" {
+ uintptr start "";
+ uintptr end "";
+ };
+
+ fact core "" {
+ uint8 acpiid "";
+ };
+
+
+
+ /*fact rootbridge "" {
+ fact addr addr "";
+ fact childbus child "";
+ fact mem range "";
+ };*/
+};