Add imx8x platform
authorDaniel Schwyn <daniel.schwyn@inf.ethz.ch>
Thu, 23 May 2019 08:27:44 +0000 (10:27 +0200)
committerDaniel Schwyn <daniel.schwyn@inf.ethz.ch>
Tue, 8 Oct 2019 13:45:28 +0000 (15:45 +0200)
Signed-off-by: Daniel Schwyn <daniel.schwyn@inf.ethz.ch>

hake/menu.lst.armv8_imx8x [new file with mode: 0644]
include/barrelfish_kpi/platform.h
kernel/Hakefile
kernel/arch/armv8/boot/boot_entry.S
kernel/arch/armv8/plat_imx8x.c [new file with mode: 0644]
platforms/Hakefile

diff --git a/hake/menu.lst.armv8_imx8x b/hake/menu.lst.armv8_imx8x
new file mode 100644 (file)
index 0000000..5162d64
--- /dev/null
@@ -0,0 +1,36 @@
+#
+# This script is used to describe the commands to start at
+# boot-time and the arguments they should receive.
+#
+bootdriver  /armv8/sbin/boot_armv8_generic
+cpudriver /armv8/sbin/cpu_imx8x
+module /armv8/sbin/init
+
+# Domains spawned by init
+module /armv8/sbin/mem_serv
+module /armv8/sbin/monitor
+
+# Special boot time domains spawned by monitor
+module /armv8/sbin/ramfsd boot
+module /armv8/sbin/skb boot
+module /armv8/sbin/kaluga boot
+module /armv8/sbin/spawnd boot
+module /armv8/sbin/proc_mgmt boot
+module /armv8/sbin/startd boot
+module /armv8/sbin/acpi boot
+
+# ramfs contents
+modulenounzip /eclipseclp_ramfs.cpio.gz nospawn
+modulenounzip /skb_ramfs.cpio.gz nospawn
+
+# Drivers
+module /armv8/sbin/corectrl auto
+module /armv8/sbin/pci auto
+
+
+# General user domains
+#module /armv8/sbin/serial_tmas auto portbase=2
+#module /armv8/sbin/fish nospawn
+#module /armv8/sbin/angler serial0.terminal xterm
+
+# End of file, this needs to have a certain length...
index fccec1d..fd99a0e 100644 (file)
@@ -38,7 +38,8 @@ enum pi_platform {
     PI_PLATFORM_FVP,
     PI_PLATFORM_QEMU,
     PI_PLATFORM_CN88XX,
-    PI_PLATFORM_RPI3
+    PI_PLATFORM_RPI3,
+    PI_PLATFORM_IMX8X
 };
 
 /* Must be at least as large as all architectures' structs. */
index 03eafe7..a0cddf9 100644 (file)
@@ -725,5 +725,50 @@ let
         "elf",
         "cpio"
     ]
-  }
+  },
+  --
+  -- i.MX8XQPX
+  --
+  cpuDriver {
+    target = "imx8x",
+    architectures = [ "armv8" ],
+    assemblyFiles = [
+        "arch/armv8/sysreg.S",
+        "arch/armv8/exceptions.S",
+        "arch/armv8/smc_hvc.S"
+    ],
+    cFiles = [
+        "arch/arm/misc.c",
+        "arch/arm/lpuart.c",
+        "arch/arm/kputchar.c",
+        "arch/arm/gdb_arch.c",
+        "arch/armv8/plat_imx8x.c",
+        "arch/armv8/init.c",
+        "arch/armv8/gdb_arch.c",
+        -----
+        "arch/armv8/kernel_multiboot2.c",
+        "arch/armv8/dispatch.c",
+        "arch/armv8/exec.c",
+        "arch/armv8/exn.c",
+        "arch/armv8/psci.c",
+        "arch/armv8/paging.c",
+        "arch/armv8/startup_arch.c",
+        "arch/armv8/syscall.c",
+        "arch/armv8/timers.c",
+        "arch/arm/debug.c",
+        "arch/arm/gic_v3.c",
+        "arch/arm/irq.c"
+    ],
+    mackerelDevices = [
+        "arm",
+        "armv8",
+        "armv8/armv8_cache_ctrl",
+        "arm_icp_pit",
+        "lpuart"
+    ],
+    addLibraries = [
+        "elf",
+        "cpio"
+    ]
+    }
   ]
index e10e121..b1d1bad 100644 (file)
 
 
 boot_entry_bsp:
+/*
+    mov        x0, 16
+       mov     x1, 24
+       movk    x0, 0x5a09, lsl 16
+       mov     w3, 139
+       movk    w3, 0x402, lsl 16
+       movk    x1, 0x5a09, lsl 16
+       str     w3, [x0]
+       mov     x3, 28
+       add     x0, x0, 4
+       mov     w2, 786432
+       movk    x3, 0x5a09, lsl 16
+       str     w2, [x1]
+_lpuart_read:
+       ldr     w1, [x0]
+       tbz     x1, 21, _lpuart_read
+       ldr     w2, [x3]
+       .p2align 3
+_lpuart_write:
+       ldr     w1, [x0]
+       tbz     x1, 23, _lpuart_write
+       and     w1, w2, 255
+       str     w1, [x3]
+       b       _lpuart_read
+    */
      /* Calling the boot initialization function for the BSP core.
 
       void boot_bsp_init(uint32_t magic,
diff --git a/kernel/arch/armv8/plat_imx8x.c b/kernel/arch/armv8/plat_imx8x.c
new file mode 100644 (file)
index 0000000..34ee387
--- /dev/null
@@ -0,0 +1,144 @@
+/**
+ * \file plat_arm_vm.c
+ * \brief
+ */
+
+
+/*
+ * Copyright (c) 2016 ETH Zurich.
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached LICENSE file.
+ * If you do not find this file, copies can be found by writing to:
+ * ETH Zurich D-INFK, Universitaetsstrasse 6, CH-8092 Zurich. Attn: Systems Group.
+ */
+
+#include <kernel.h>
+#include <offsets.h>
+#include <arch/arm/platform.h>
+#include <serial.h>
+#include <arch/arm/lpuart.h>
+#include <arch/arm/gic.h>
+
+#include <getopt/getopt.h>
+#include <sysreg.h>
+#include <dev/armv8_dev.h>
+#include <barrelfish_kpi/arm_core_data.h>
+#include <psci.h>
+#include <arch/armv8/global.h>
+
+/* RAM starts at 0x80000000 */
+lpaddr_t phys_memory_start= 0x80000000;
+
+/*
+ * ----------------------------------------------------------------------------
+ * GIC
+ * ----------------------------------------------------------------------------
+ */
+
+lpaddr_t platform_gic_distributor_base = 0x8000000;
+lpaddr_t platform_gic_redistributor_base = 0x80a0000;
+
+/*
+ * ----------------------------------------------------------------------------
+ * UART
+ * ----------------------------------------------------------------------------
+ */
+
+/* the maximum number of UARTS supported */
+#define MAX_NUM_UARTS 1
+
+/* the serial console port */
+unsigned int serial_console_port = 0;
+
+/* the debug console port */
+unsigned int serial_debug_port = 0;
+
+/* the number of physical ports */
+unsigned serial_num_physical_ports = 1;
+
+/* uart bases */
+lpaddr_t platform_uart_base[MAX_NUM_UARTS] =
+{
+        0x5A090000
+};
+
+/* uart sizes */
+size_t platform_uart_size[MAX_NUM_UARTS] =
+{
+    0x10000
+};
+
+errval_t serial_init(unsigned port, bool initialize_hw)
+{
+    lvaddr_t base = local_phys_to_mem(platform_uart_base[port]);
+    lpuart_init(port, base, initialize_hw);
+    return SYS_ERR_OK;
+};
+
+/*
+ * Do any extra initialisation for this particular CPU (e.g. A9/A15).
+ */
+void platform_revision_init(void)
+{
+
+}
+
+/*
+ * Figure out how much RAM we have
+ */
+size_t platform_get_ram_size(void)
+{
+    return 0;
+}
+
+/*
+ * Boot secondary processors
+ */
+errval_t platform_boot_core(hwid_t target, genpaddr_t gen_entry, genpaddr_t context)
+{
+    printf("Invoking PSCI on: cpu=0x%lx, entry=0x%lx, context=0x%lx\n", target, gen_entry, context);
+    struct armv8_core_data *cd = (struct armv8_core_data *)local_phys_to_mem(context);
+    cd->page_table_root = armv8_TTBR1_EL1_rd(NULL);
+    cd->cpu_driver_globals_pointer = (uintptr_t)global;
+    __asm volatile("dsb   sy\n"
+                   "dmb   sy\n"
+                   "isb     \n");
+    return psci_cpu_on(target, gen_entry, context);
+}
+
+void platform_notify_bsp(lpaddr_t *mailbox)
+{
+
+}
+
+
+/*
+ * Return the core count
+ */
+size_t platform_get_core_count(void)
+{
+    return 0;
+}
+
+/*
+ * Print system identification. MMU is NOT yet enabled.
+ */
+void platform_print_id(void)
+{
+
+}
+
+/*
+ * Fill out provided `struct platform_info`
+ */
+void platform_get_info(struct platform_info *pi)
+{
+    pi->arch = PI_ARCH_ARMV8A;
+    pi->platform = PI_PLATFORM_IMX8X;
+}
+
+void armv8_get_info(struct arch_info_armv8 *ai)
+{
+
+}
index 02d206c..77b34f8 100644 (file)
@@ -513,6 +513,16 @@ let bin_rcce_lu = [ "/sbin/" ++ f | f <- [
        [ ("root", "/armv8_rpi3_image.efi") ])
     "Raspberry Pi 3 quad ARM Cortex A53",
 
+    platform "imx8x" [ "armv8" ]
+      ([ ("armv8", "/sbin/cpu_imx8x"), ("armv8", "/sbin/boot_armv8_generic")  ]
+       ++
+       [ ("armv8", f) | f <- armv8_modules ]
+       ++
+       [ ("",       f) | f <- modules_generic]
+       ++
+       [ ("root", "/armv8_imx8x_image.efi") ])
+    "NXP iMX8QPX",
+
     platform "PandaboardES" [ "armv7" ]
     ([ ("armv7", f) | f <- pandaModules ] ++
      [ ("root", "/armv7_omap44xx_image"),
@@ -600,6 +610,8 @@ let bin_rcce_lu = [ "/sbin/" ++ f | f <- [
 
     armv8Image "armv8_rpi3" "armv8_rpi3" "armv8_generic" "a53_rpi3" modules_generic armv8_modules,
 
+    armv8Image "armv8_imx8x" "armv8_imx8x" "armv8_generic" "imx8x" modules_generic armv8_modules,
+
     armv8EFIImage "armv8_a57_fvp_base" "armv8_a57_fvp_base" "armv8_generic" "a57_fvp" modules_generic armv8_modules,
 
     armv8EFIImage "armv8_a57_qemu" "armv8_a57_qemu" "armv8_generic" "a57_qemu" modules_generic armv8_modules,
@@ -618,6 +630,7 @@ let bin_rcce_lu = [ "/sbin/" ++ f | f <- [
                      "armv8_a57_fvp_1",
                      "armv8_apm88xxxx",
                      "armv8_cn88xx",
+                     "armv8_imx8x",
                      "armv8_rpi3",
                      "armv7_a9ve_1",
                      "armv7_a9ve_4",
@@ -741,6 +754,15 @@ let bin_rcce_lu = [ "/sbin/" ++ f | f <- [
       )
     "Boot QEMU in 64-bit ARM mode emulating a ARM Virtual Machine using U-Boot",
 
+    boot "qemu_armv8_uboot" [ "armv8" ] ([
+      In SrcTree "tools" "/tools/qemu-wrapper.sh",
+      Str "--image", In BuildTree "root" "/armv8_a57_qemu_image.efi",
+      Str "--arch", Str "armv8",
+      Str "--uboot"
+       ]
+      )
+    "Boot QEMU in 64-bit ARM mode emulating a ARM Virtual Machine",
+
     boot_fastmodels "ARM_FastModels_Base_A57x1" [ "armv8" ] 
       "armv8_a57_fvp_base_image"
       "ARM_FastModels/ARMv8_Base_A57x1/ARMv8_Base_A57x1"