From: Simon Gerber Date: Mon, 4 May 2015 13:13:36 +0000 (+0200) Subject: armv5: make cpu driver run again. X-Git-Tag: release2015-05-22~20 X-Git-Url: http://git.barrelfish.org/?p=barrelfish;a=commitdiff_plain;h=299f7984b2b01d3df8b78dfd082aa5c92c20941f armv5: make cpu driver run again. Note: this is not a real fix, it does not implement the switch cases in paging_generic.c:paging_tlb_flush_range() correctly. Signed-off-by: Simon Gerber --- diff --git a/include/target/arm/barrelfish_kpi/paging_arm_v5.h b/include/target/arm/barrelfish_kpi/paging_arm_v5.h index 2119669..553b085 100644 --- a/include/target/arm/barrelfish_kpi/paging_arm_v5.h +++ b/include/target/arm/barrelfish_kpi/paging_arm_v5.h @@ -23,7 +23,7 @@ /* 1MB large pages */ #define LARGE_PAGE_BITS 20 -#define LARGE_PAGE_SIZE (1u << PAGE_LARGE_BITS) +#define LARGE_PAGE_SIZE (1u << LARGE_PAGE_BITS) #define LARGE_PAGE_MASK (LARGE_PAGE_SIZE - 1) #define LARGE_PAGE_OFFSET(a) ((a) & LARGE_PAGE_MASK) diff --git a/kernel/paging_generic.c b/kernel/paging_generic.c index 8133035..991fd96 100644 --- a/kernel/paging_generic.c +++ b/kernel/paging_generic.c @@ -254,7 +254,7 @@ errval_t paging_tlb_flush_range(struct cte *frame, size_t pages) // flush TLB entries for all modified pages size_t page_size = 0; switch(leaf_pt->cap.type) { -#if __x86_64__ +#if defined(__x86_64__) case ObjType_VNode_x86_64_ptable: page_size = X86_64_BASE_PAGE_SIZE; break; @@ -264,14 +264,17 @@ errval_t paging_tlb_flush_range(struct cte *frame, size_t pages) case ObjType_VNode_x86_64_pdpt: page_size = X86_64_HUGE_PAGE_SIZE; break; -#elif __i386__ +#elif defined(__i386__) case ObjType_VNode_x86_32_ptable: page_size = X86_32_BASE_PAGE_SIZE; break; case ObjType_VNode_x86_32_pdir: page_size = X86_32_LARGE_PAGE_SIZE; break; -#elif __arm__ +#elif defined(__ARM_ARCH_5__) + // XXX: cannot add code here without breaking CPU driver?! + // -SG, 2015-05-04. +#elif defined(__ARM_ARCH_7__) case ObjType_VNode_ARM_l1: panic("large page support for ARM NYI!\n"); break;