From a6aed1a5c07afcc3472ed9f297f0dde19a5606d5 Mon Sep 17 00:00:00 2001 From: David Cock Date: Fri, 2 Sep 2016 13:33:35 +0200 Subject: [PATCH] ARMv7: bit.LITTLE boot target Signed-off-by: David Cock --- hake/menu.lst.armv7_a15a7ve | 43 ++++++++++++++++++++++++++++++++ platforms/Hakefile | 24 +++++++++++++++++- usr/skb/programs/plat_VE_A15x4_A7x4.pl | 30 ++++++++++++++++++++++ 3 files changed, 96 insertions(+), 1 deletions(-) create mode 100644 hake/menu.lst.armv7_a15a7ve create mode 100644 usr/skb/programs/plat_VE_A15x4_A7x4.pl diff --git a/hake/menu.lst.armv7_a15a7ve b/hake/menu.lst.armv7_a15a7ve new file mode 100644 index 0000000..6c55191 --- /dev/null +++ b/hake/menu.lst.armv7_a15a7ve @@ -0,0 +1,43 @@ +timeout 0 + +# +# This script is used to describe the commands to start at +# boot-time and the arguments they should receive. +# +# Kernel arguments are not read from this script. On QEMU they can be +# set using 'qemu-system-arm -append ...'. + +title Barrelfish +#root (nd) +kernel /armv7/sbin/cpu_a15ve loglevel=4 periphbase=0x2c000000 cntfrq=100000000 consolePort=0 timerirq=29 +module /armv7/sbin/cpu_a15ve +module /armv7/sbin/init + +# Domains spawned by init +module /armv7/sbin/mem_serv +module /armv7/sbin/monitor + +# Special boot time domains spawned by monitor +module /armv7/sbin/ramfsd boot +module /armv7/sbin/skb boot +modulenounzip /eclipseclp_ramfs.cpio.gz nospawn +modulenounzip /skb_ramfs.cpio.gz nospawn +module /armv7/sbin/kaluga boot add_device_db=plat_VE_A15x4_A7x4 +module /armv7/sbin/spawnd boot +module /armv7/sbin/startd boot + +# Device drivers +# module /armv7/sbin/serial_pl011 auto +module /armv7/sbin/serial_kernel irq=37 +module /armv7/sbin/corectrl auto + +# General user domains +module /armv7/sbin/angler serial0.terminal dumb +module /armv7/sbin/fish nospawn + +module /armv7/sbin/memtest + +# gem5 simulates 512MB of RAM starting at 0x80000000 +# start size id +mmap map 0x00000000 0x80000000 13 # Device region +mmap map 0x80000000 0x20000000 1 diff --git a/platforms/Hakefile b/platforms/Hakefile index 31bb575..8dda652 100644 --- a/platforms/Hakefile +++ b/platforms/Hakefile @@ -503,6 +503,12 @@ let bin_rcce_lu = [ "/sbin/" ++ f | f <- [ ("root", "/armv7_a15ve_gem5_image-gdb.gdb") ]) "VersatileExpress EMM board with ARM Cortex-A15s", + platform "VExpressEMM-A15-A7" [ "armv7" ] + ([ ("armv7", f) | f <- vExpressEMMModules_A15 ] ++ + [ ("root", "/armv7_a15a7ve_image"), + ("root", "/armv7_a15a7ve_image-gdb.gdb") ]) + "VersatileExpress EMM board with ARM Cortex-A15s and A7s", + platform "VExpressEMM-A9" [ "armv7" ] ([ ("armv7", f) | f <- vExpressEMMModules_A9 ] ++ [ ("root", "/armv7_a9ve_1_image"), @@ -546,6 +552,10 @@ let bin_rcce_lu = [ "/sbin/" ++ f | f <- [ -- quirks) armv7Image "armv7_a15ve_gem5" "ve" "a15ve" "0x80000000" vExpressEMMModules_A15, + -- Build the big.LITTLE A15/A7 simulation image (VersatileExpress EMM + -- board, 4+4 cores) + armv7Image "armv7_a15a7ve" "ve" "a15ve" "0x80000000" vExpressEMMModules_A15, + -- Build the A9 simulation image (VersatileExpress EMM board, 1 core) armv7Image "armv7_a9ve_1" "ve" "a9ve" "0x80000000" vExpressEMMModules_A9, @@ -584,6 +594,7 @@ let bin_rcce_lu = [ "/sbin/" ++ f | f <- [ "armv7_a15ve_fvp_1", "armv7_a15ve_fvp_4", "armv7_a15ve_gem5", + "armv7_a15a7ve", "armv7_omap44xx", "armv7_zynq7" ]], Rules [ copyFile SrcTree "root" ("/hake/menu.lst." ++ p) @@ -644,7 +655,18 @@ let bin_rcce_lu = [ "/sbin/" ++ f | f <- [ boot "FVP_VE_A15x4" [ "armv7" ] [ Str "FVP_VE_Cortex-A15x4-A7x4", In BuildTree "root" "/armv7_a15ve_fvp_4_image" ] - "Boot on a eight-core Cortex-A15/A7 FVP model", + "Boot on a four-core Cortex-A15 FVP model", + + boot "FVP_VE_A15x4_A7x4" [ "armv7" ] [ + Str "FVP_VE_Cortex-A15x4-A7x4", + NStr "-a coretile.cluster0.*=", + In BuildTree "root" "/armv7_a15a7ve_image", + NStr "-a coretile.cluster1.*=", + In BuildTree "root" "/armv7_a15a7ve_image", + Str "-C", + Str "coretile.dualclustersystemconfigurationblock.CFG_ACTIVECLUSTER=0x3" + ] + "Boot on a 4+4-core Cortex-A15/A7 FVP model", boot "FVP_VE_A17x1" [ "armv7" ] [ Str "FVP_VE_Cortex-A17x1", diff --git a/usr/skb/programs/plat_VE_A15x4_A7x4.pl b/usr/skb/programs/plat_VE_A15x4_A7x4.pl new file mode 100644 index 0000000..5b4d8ad --- /dev/null +++ b/usr/skb/programs/plat_VE_A15x4_A7x4.pl @@ -0,0 +1,30 @@ +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +% Copyright (c) 2016, ETH Zurich. +% All rights reserved. +% +% This file is distributed under the terms in the attached LICENSE file. +% If you do not find this file, copies can be found by writing to: +% ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group. +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% + +% Statically-initialised hardware facts for the big.LITTLE Fixed Virtual +% Platform with 4 A15 cores and 4 A7 + +cpu_driver(cortexA15, "/armv7/sbin/cpu_a15ve"). +monitor(cortexA15, "/armv7/sbin/monitor"). + +% The A7 runs fine with the A15 CPU driver. +cpu_driver(cortexA7, "/armv7/sbin/cpu_a15ve"). +monitor(cortexA7, "/armv7/sbin/monitor"). + +% One cluster of four Cortex A15s +arm_core(16'000000,cortexA15). +arm_core(16'000001,cortexA15). +arm_core(16'000002,cortexA15). +arm_core(16'000003,cortexA15). + +% A second cluster of four Cortex A5s +arm_core(16'000100,cortexA7). +arm_core(16'000101,cortexA7). +arm_core(16'000102,cortexA7). +arm_core(16'000103,cortexA7). -- 1.7.2.5